Bengaluru, Feb 25 : Tattvam AI, a deeptech startup building AI systems to automate semiconductor chip design, today announced it has raised $1.7 million in pre-seed funding led by Seedcamp, with participation from EWOR, Entropy Industrial Ventures, Concept Ventures, semiconductor angel Stan Boland.
The world is racing to build custom silicon. Unlike general-purpose chips designed to handle a wide variety of tasks, custom silicon refers to specialized processors built and optimized for specific workloads – such as AI training or AI inference. These purpose-built chips can deliver up to 100x performance improvements over general-purpose hardware like GPUs for their targeted applications, while often consuming significantly less power.
Companies from tech giants to emerging startups are racing to build custom chips. Google has developed its own Tensor Processing Units optimized for AI workloads, Nvidia has partnered with Groq on specialized AI inference chips, and UK startups Fractile and Olix are building custom processors all in pursuit of more powerful, application-tailored silicon that can handle tomorrow’s computational demands more efficiently.
The stakes are enormous: as AI models grow larger and more complex, and as applications from autonomous vehicles to drug discovery require massive computational power, custom silicon has become a critical competitive advantage.
Yet the process to design a chip still takes years of painstaking manual work and the pool of engineers who can do it remains small. Meanwhile, on the software side, AI is already writing complex code at record speed. Tattvam AI aims to bring this transformation to the semiconductor world enabling more chips, designed faster, customised for the exact application making the applications built on top of them dramatically faster.
Tattvam AI is introducing a novel approach to chip design by building an AI system that deeply understands circuit structure and autonomously solves complex design tasks, reducing chip development cycles.
“Chip design is fundamentally a reasoning problem over an enormous search space, not unlike the kind of reasoning that’s needed to solve hard problems in mathematics. Current AI tools, even the most advanced LLMs, struggle with the deep structural understanding that chip design demands. We’re building a reasoning model that actually understands circuits from first principles – the constraints, the tradeoffs, the interdependencies – the same way a world-class engineer would and doing it in a fraction of the time.” – Bragadeesh Suresh Babu, CEO and Co-founder, Tattvam AI.
By automating key parts of the design process, Tattvam AI aims to make custom silicon accessible to more companies, reduce development costs, and enable rapid iteration on chip designs – bringing what currently takes 2-3 years down to weeks.
Bragadeesh is an alumnus of IIT Madras, consistently ranked as India’s 1 engineering institution and alma mater of notable tech leaders including Perplexity CEO Aravind Srinivas. He developed an early passion for mathematics through competitive Olympiads before entering the AI and hardware space.
He was an early engineer at UK based brain-monitoring startup CoMind, which recently raised $100 million, and later became one of the earliest engineers at UK-based chip startup Fractile. Turning down an offer to join Google’s TPU team, Bragadeesh chose instead to build Tattvam AI and pursue his vision independently.
“Bragadeesh is one of the most driven, energetic and compelling young founders in today’s chip industry. His conviction that Tattvam AI will dramatically speed-up the complex and iterative process of using EDA tools and models to design chips, cutting timelines from years to weeks, is sure to be embraced by the world’s top teams” says Stan Boland, former founder/CEO at Icera (bought by NVIDIA) and Element 14 (bought by Broadcom).
Bragadeesh founded Tattvam AI with Lannan Jiang, who has been developing chips at a research lab at ETH Zurich. Tattvam AI plans to launch its first product in the coming months as it works with partners to accelerate the development of next-generation chips.
